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ENSEMBLE® 6000 Series LDS6523 Low Density Server OpenVPX i7

Product Description

The Ensemble® 6000 Series OpenVPX Intel 3rd Generation Core i7 Quad-Core LDS6523 Module from Mercury Systems combines a powerful Ivy Bridge mobile-class quad-core Intel processor, the new Mellanox ConnectX-3 bridge for unsurpassed fabric data rates, and configurable mezzanine I/O in a single 6U OpenVPX slot. The LDS6523, as Mercury’s latest low-density server, provides a next-generation architecture that balances the disruptive computational capabilities of the AVX-enabled Core i7 processor with disruptive QDR InfiniBand or 40 Gigabit Ethernet data paths. The combination provides a powerful and scalable computing architecture that is well aligned with high-end radar, electronic warfare and image processing applications.
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  • 6U OpenVPX™-compliant VITA 65/46/48 (VPX-REDI) module
  • Intel® 3rd Generation Core™ i7 (Ivy Bridge mobile-class) quad-core processor at up to 2.3 GHz with 147 GFLOPS peak performance
  • Mellanox ConnectX-3 fabric support InfiniBand or 40 Gigabit Ethernet
  • Integrated Gen3 PCIe® switching infrastructure for on-board and off-board co-processing expansion-plane communications 
  • Balances the power of an AVX-enabled Core™  i7 processor with high-bandwidth IO
  • PCIe® architecture supports full bandwidth operation of mezzanine IO, which in turn optimizes system IO
  • System management capabilities enable monitoring, alarm management, and other remote activities
  • ConnectX-3 data plane supports off-the-shelf software such as OFED and OpenMPI

Intel® 3rd Generation Core™ i7 Ivy Bridge Processor 
Quad-core with Advanced Vector Extensions (AVX) 2.3 GHz 3615QE
Peak performance 147 GFLOPS (peak theoretical)
Threads per core 2
Intel Virtualization Technology
   DDR3-1600 8 GB with ECC
   Raw memory bandwidth 25 GB/s (total)
Local SATA flash 8 GB
BIOS SPI flash

Mellanox ConnectX-3 VPI Host Card Adaptors
Provides fabric bridging to data plane
Supports DDR or QDR InfiniBand, or 40 Gigabit Ethernet protocols*
     *The LDS6523 currently supports DDR Infiniband. Planned variants will support QDR Infiniband or 40 GigE. Variants may require changes to the system infrastructure such as connectors, backplane, etc.

IPMI (System Management) 
On-board IPMI Controller
Voltage and temperature monitor
Geographical address monitor
Power/reset control
On-board FRU EEPROM interface
FPGA, CPU and CPLD interfaces

Ethernet Connections 
1000BASE-BX Ethernet to P4 connector 2
   OpenVPX control plane
10/100/1000BASE-T Ethernet to P4 connector 1
   Accessible via OpenVPX RTM or external chassis interface
10/100/1000BASE-T Ethernet connection 1
   To front panel (air-cooled module) or backplane P4 connector (conduction-cooled module)
Ethernet functions supported by the chipset include:
   UDP, TCP, SCTP, ARP, IPv4, IPv6, IEEE1588, flow control, 802.1P (priority) and 802.1Q (VLAN)

OpenVPX Multi-Plane Architecture 
System management via IPMB-A and IPMB-B link on P0 management plane
InfiniBand or 40 Gigabit Ethernet interfaces on P1 data plane
Full x16 or dual x8 Gen2 PCIe® expansion plane to P2 connector
Dual 1000BASE-BX Ethernet control plane

PMC-X/XMC Sites 
Mezzanine sites 1 PMC/XMC, 1 XMC only
PCI-X®-to-PCIe bridge Connects PMC site to on-board PCI Express® switch
PMC PCI support 33 and 66 MHz
PMC PCI-X support 66, 100, and 133 MHz
PMC user-defined I/O from J14 to backplane
PCIe XMC sites per VITA 42.3 with XMC user-defined I/O from Jn6 to backplane

Additional I/O Capabilities 
One RS-232 serial interface to front panel (air-cooled) or backplane (conduction-cooled)
Configurable for RS-232 or RS-422 signaling when routed to backplane
One additional RS-232/RS-422 serial interface to backplane
One front-panel USB 2.0 interface (air-cooled configurations only)
One USB 2.0 interface to backplane
One USB 3.0 interface to backplane
One front-panel DisplayPort interface (with optional I/O adaptor)
One DVI interface to backplane
One front-panel eSATA interface (with optional I/O adaptor)
Two SATA interfaces to backplane
Eight single-ended GPIO interfaces to backplane
System signals to backplane
NVMRO, ChassisTest, Environmental Bypass, MemoryClear

6U VPX (air-cooled and conduction-cooled)
1.0” slot pitch
OpenVPX™ and VPX-REDI 

Please check the datasheet. 

OpenVPX System Specification encompasses VITA 46.0, 46.3, 46.4, 46.6, 46.11
Compatible with VITA 65
VITA 46/48.1/48.2 (REDI)
Serial RapidIO®, PCI Express®, 10 Gigabit Ethernet