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ENSEMBLE® 6000 Series LDS6521 Low Density Server OpenVPX i7

Product Description

The Ensemble® 6000 Series OpenVPX (VITA 65) Intel® 2nd Generation Core i7 Quad-Core LDS6521 Module combines a powerful Sandy Bridge mobile-class quadcore Intel® 2nd Generation Core i7 processor, a high-performance FPGA for both fabric bridging and user-application functions, and high-bandwidth on-board and off-board communication fabrics in a single 6U OpenVPX slot. 

The LDS6521, as Mercury’s next low-density server, provides a next-generation architecture that balances the disruptive computational capabilities of the Intel 2nd Generation Core i7 processor with key high-bandwidth I/O interfaces, providing a powerful and scalable computing architecture that is well aligned with high-end radar, electronic warfare, and image processing applications.

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  • One 10/100/1000BASE-T Gigabit Ethernet connection can be routed to the front panel on air-cooled configurations or to the backplane on conduction-cooled configurations.
  • One additional 10/100/1000BASE-T Gigabit Ethernet connection routed to the backplane.
  • Two 1000BASE-BX SERDES Ethernet connections routed to the backplane.
  • Two DVI graphics interfaces: one routed to the front panel on air-cooled configurations only via an optional I/O adaptor; the other routed to the backplane.
  • One TIA-232 serial port routed to the front panel on air-cooled configurations, or to the backplane on conduction-cooled configurations. When routed to the backplane, the serial interface can be configured for either TIA-232 or TIA-422/TIA-485 signaling.
  • One front panel USB 2.0 interface available on air-cooled configurations.
  • Two backplane USB 2.0 interfaces available with both air-cooled and conduction-cooled configurations.
  • One front-panel eSATA interface provided on air-cooled configurations via an optional I/O adaptor.
  • Two SATA interfaces to the backplane provided to easily interface with storage devices.
  • Eight GPIO lines act as discrete I/O usable as input, output, or to generate interrupts.
  • Several additional bused signals enhance functionality.
  • New low-density server delivers next-generation processing and fabric capabilities
  • 6U OpenVPX™-compliant VITA 65/46/48 (VPX-REDI) module
  • Intel® 2nd Generation Core i7 (Sandy Bridge mobile-class) quad-core processor at up to 2.1 GHz with 134 GFLOPS peak performance
  • POET™-enabled for Gen 2 serial RapidIO® and/or 10 Gigabit Ethernet fabric
  • Integrated Gen 2 80-lane PCIe switching infrastructure for on-board and off-board co-processing expansion-plane communications
  • Mercury MultiCore Plus® software infrastructure support

Intel® 2nd Generation Core i7 Sandy Bridge Processor 
Quad-core with Advanced Vector Extensions (AVX)
   2.1 GHz 2715QE
Peak performance: 134 GFLOPS (estimate)
Threads per core: 2
Intel Virtualization Technology
DDR3-1333: Up to 8 GB with ECC
   Raw memory bandwidth: 21 GB/s (total)
Local SATA flash: Up to 8 GB
BIOS SPI flash 

Xilinx® Virtex™-6 HX250T or HX380T FPGA 
Provides fabric bridging to data plane
Can act as co-processor to execute iFFT/FFT, image or
    signal processing
Configured from CPU or dedicated configuration ROM

IPMI (System Management) 
On-board IPMI Controller
Voltage and temperature monitor
Geographical address monitor
Power/reset control
On-board FRU EEPROM interface
FPGA, CPU, and CPLD interfaces

Ethernet Connections 
1000BASE-BX Ethernet to P4 connector :2
   OpenVPX control plane
10/100/1000BASE-T Ethernet to P4 connector: 1
   Accessible via OpenVPX RTM or external chassis interface
10/100/1000BASE-T Ethernet connection: 1
   To front panel (air-cooled module)
   or backplane P4 connector (conduction-cooled module)
Ethernet functions supported by the chipset include:
   UDP, TCP, SCTP, ARP, IPv4, IPv6, IEEE1588,
   flow control, 802.1P (priority), and 802.1Q (VLAN)

OpenVPX Multi-Plane Architecture 
System management via IPMB-A and IPMB-B link on P0
   management plane
Quad 4x serial RapidIO or 10 Gigabit Ethernet interfaces on P1
   data plane
Full x16 or dual x8 PCIe expansion plane to P2 connector
x8 PCIe expansion plane to P5 connector
Dual 1000BASE-BX Ethernet control plane

PMC-X/XMC Sites 
Mezzanine sites: 1 PMC/XMC, 1 XMC only
PCI-X-to-PCIe bridge
   Connects PMC site to on-board PCI Express switch
PMC PCI support: 33 and 66 MHz
PMC PCI-X support: 66, 100, and 133 MHz
PMC user-defined I/O from J14 to backplane
PCIe XMC sites per VITA 42.3 with XMC user-defined I/O
   from Jn6 to backplane

Additional I/O Capabilities 
RS-232 serial interface to front panel: 1
   (air-cooled) or backplane (conduction-cooled)
Configurable for RS-422 or RS-485 signaling when routed
   to backplane
Front-panel USB 2.0 interface: 1
   (air-cooled configurations only)
USB 2.0 interfaces to backplane: 2
Front-panel DVI interface (with optional I/O adaptor): 1
DVI interface to backplane: 1
Front-panel eSATA interface (with optional I/O adaptor): 1
SATA interfaces to backplane: 2
Single-ended GPIO interfaces to backplane: 8
System signals to backplane
   NVMRO, ChassisTest, Environmental Bypass, MemoryClear

6U VPX (air-cooled and conduction-cooled)
1.0” slot pitch

Please check the datasheet.

OpenVPX System Specification encompasses
   VITA 46.0, 46.3, 46.4, 46.6, 46.7, 46.9, 46.11
Compatible with VITA 65
VITA 48/48.1/48.2 (REDI)
Serial RapidIO, PCI Express, 10 Gigabit Ethernet