Any combination of sectors can be concurrently erased. Also supports full chip erase
100,000 Write/Erase Cycles Minimum
Organized as 2Mx8
Commercial, Industrial, and Military Temperature Ranges
5V Read and Write
Low Power CMOS
Data# Polling and Toggle Bit feature for detection of program or erase cycle completion.
Supports reading or programming data to a sector not being erased.
RESET# pin resets internal state machine to the read mode.
Multiple Ground Pins for Low Noise Operation
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