EDI88128CS/LPS-F

Docs & Specs

Data Sheet

Application Notes

Overview

Model:  EDI88128CS/LPS-F
1Mb 128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time.

A Low Power version with 2V Data Retention (EDI88128LPS) is also available for battery back-up operation. Military product is available compliant to MIL-PRF-38535.

Features

  • Access Times of 15*, 17, 20, 25, 35, 45, 55ns
  • CS# and OE# Functions for Bus Control
  • 2V Data Retention (EDI88128LPS)
  • TTL Compatible Inputs and Outputs
  • Fully Static, No Clocks
  • Organized as 128Kx8
  • Commercial, Industrial and Military Temperature Ranges
  • Thru-hole and Surface Mount Packages JEDEC Pinout
    • 32 lead Ceramic Flatpack (Package 142)
  • Single +5V (±10%) Supply OperationThe EDI88128CS is a high speed, high performance, 128Kx8 megabit density Monolithic CMOS Static RAM.

* 15ns access time is advanced information, contact factory for availability.

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