Docs & Specs

Data Sheet

Application Notes


Model:  EDI88130CS/LPS-T
1Mb 128Kx8 Monolithic SRAM, SMD 5962-89598

An additional chip enable line provides system memory security during power down in non-battery backed up systems and memory banking in high speed battery backed systems where large multiple pages of memory are required.

The EDI88130CS has eight bi-directional input-output lines to provide simultaneous access to all bits in a word.

A low power version, EDI88130LPS, offers a 2V data retention function for battery back-up applications.

Military product is available compliant to MIL-PRF-38535.


* 15ns access time is advanced information, contact factory for availability.

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