The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.
The device can be configured as a 512K x 32 and used to create a single chip external data memory solution for TI's TMS320LC31 (figure 5), or Analog's SHARCTM DSP (figure 6). The device provides a 56% space savings when compared to four 512Kx8, 36 pin SOJs. In addition the EDI8K32512V has only a 10pF load on the data lines vs. 32 pF for four plastic SOJs.
The device provides a memory upgrade of the EDI8F32256V (256K x 32) or the EDI8L32128V (128K x 32) (figure 8). Alternatively, the device's chip enables can configure it as a 1M x 16. A 1M x 48 program memory array for Analog's CHARC DSP is created using three devices (figure 7). If this memory is too deep, two 512K x 24s (EDI8L24512V) can be used to create a 512K x 48 array or two 128K x 24s (EDI8L24128V) can be used to create a 128K x 48 array.
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