Power Dissipation – a New Limiting Factor
Historically the advancements in FPGA technology have supported each new generation of high-performance EW system. However, in the last few years a new limiting factor in FPGA performance is emerging. While modern FPGA devices have the size and speed to support processing-intensive EW and radar algorithms, they are unusable if the system fails to manage the heat generated by the devices. Additionally, since the power usage depends on the specific algorithm installed on the FPGA, it is possible that this limitation is not discovered until the FPGA module is integrated into the customer’s system.