In the past Space Time Adaptive Processing (STAP) was a challenge for embedded systems. This white paper studies STAP processing approaches, using Xeon D and E processors for comparison.
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Discover how technologies developed by Mercury Systems and NVIDIA scale the best AI-enabling data center processing capabilities to the edge for real-time decision-making.
White Paper: Cloud-Scalable Cross-Domain Solutions for an Evolving Battlefield
Cloud-scalable cross-domain solution methodologies, challenges and implementations for rapid, secure and correct information transfer between multiple security domains.
White Paper: Enabling big data processing and AI-powered everything, everywhere
Learn how Mercury and Intel collaborate to scale and deploy composable data center capabilities across the fog and edge layers with high performance embedded edge computing (HPEEC)
White Paper: Safety Certifiable Computing for Tomorrow's Avionics
Modern sensors and AI need powerful flight-ready computing, but creating safe multi-core processing systems is difficult to achieve. Learn why Intel-based solutions are suited for AI and FVL.
White Paper: Protecting Satellite Image Integrity from Radiation
Today's space imaging systems require radiation-tolerant NAND flash components with advanced error correction, packaged in lightweight, rugged VPX form factors.
White Paper: Bringing Commercial Technologies to Defense in the Age of AI
Artificial Intelligence (AI) is rapidly transforming the defense industry by broadening the scope of machine applications and leveling the playing field for nation states looking to gain power.
White Paper: Rappid; an app-ready, spectrum processing platform
Rappid: A modular, application-ready spectrum processing platform
PCIe Gen 4 technologies increase application efficiency by eliminating bottlenecks and increasing throughput for multi-domain, compute-intensive applications at the edge.
White Paper: Next-Gen Safe and Secure Processing Systems for Aerospace and Defense
This whitepaper discusses how new holistic systems security engineering and flight-safety certification design approaches are enabling smarter platforms to be deployed anywhere.
White Paper: Selecting Optimal Avionic and Vetronic Displays for Your Application
This paper first discusses advanced capabilities that enhance LCD technology and then reviews business factors to consider when selecting or specifying display systems.
White Paper: Redefining Sensor Edge Processing with 2.5D System-in-Package Technology
By working at the chip level and leveraging new 2.5D system-in-package capabilities, designers can combine complex semiconductor dies into a single component while maintaining trust and security.
White Paper: Understanding Broadband Electrical Behavior of Through-Silicon-Via (TSV)
At the epicenter of modern 3D and 2.5D package design is through-silicon-via (TSV) technology. TSVs facilitate the vertical integration of multiple die.
This paper investigates both the large area display architecture with available options to solve redundancy, as well as, beam steering techniques to limit canopy reflections in bubble canopy cockpits.
Today’s Electronic Warfare, and EW subsets that include Electronic Attack (EA), Electronic Protection (EP) and Electronic Support (ES) are critical to holding a strategic advantage.
White Paper: Accurate FPGA Power Modeling
Maximizing FPGA processing and channel density in SWaP-constrained EW applications through accurate thermal modeling.
White Paper: High-Performance OpenVPX Forced Air-Cooling Architectures
How the most innovative embedded cooling technologies compare, Embedding modern, powerful processors into rugged OpenVPX processing systems requires efficient cooling for reliable, full throttle, unre
How to affordably decrease safety critical processing subsystem development time and program risk using DO-178 / DO-254 certifiable off-the-shelf building blocks.
Mercury, contracted by Airbus D&S is supplying processing subsystems as part of the EGNOS common computing platform.
The real-time processing of data requires fastest FPGA devices and multicore processors. These devices cannot provide peak performance without highly dense and high-speed DDR4 and DDR5 memory.