Keep up with the latest converter technology at the edge
COTS 3U VPX SOSA aligned coprocessor board fueled by Xilinx® Versal® HBM
An innovative combination of HBM (high-bandwidth memory), equally substantial DSP processing engines, high-speed 100 GigE interfaces and the Navigator® design suite means massive data throughput critical for applications in adaptable artificial intelligence and electronic warfare where low latency is required for real-time decision-making.
- Xilinx Versal HBM ACAP
- 10 GigE Interface and 40 GigE Interface
- Optional VITA 67.3C optical interface for backplane gigabit serial communication
- Up to 4, 100 GigE UDP interfaces
- Compatible with several VITA standards including: VITA 46, VITA 48.11, VITA 67.3C and VITA 65 (OpenVPX™ System Specification)
- Ruggedized and conduction-cooled
- Navigator Design Suite for software and custom IP development
- Expansion mezzanine interface for data converter or digital I/O boards
Adaptive Compute Acceleration
- Type: Xilinx/AMD Versal HBM VH1542
- Adaptable Engines: 3,837k Logic Cells
- Intelligent Engines: 7,392 DSP slices
- Scalar Engines: Dual-core ARM Cortex-A72, Dual-core ARM Cortex-R5F
- HBM DRAM: 16 GBytes
- Total Block RAM: 89 Mb
- UltraRAM: 366 Mb
- Interface: GPIO, 4 pairs, LVDS
- Interface: 1, 10, 40 GigE
- Interface: PCI-Express Gen 1, 2, 3, or 4: x4
- Interface: Optical, 16 full duplex lanes,26 Gb/sec
- ECCM: 64 GBytes
- SDRAM: DDR4, 8 GBytes
- Configuration FLASH: 2x 1 Gbit QSPI
- Operating Temp: 0° to 70° C
- Storage Temp: -50° to 100° C
- Relative Humidity: 0 to 95%, non-condensing
- The 5560 is compatible with the VITA 65 OpenVPX Specification:SLT3-PAY-1F1U1S1S1U2F1H-14.6.11-12 module profile.
What's the Big Deal about ACAP Technology?download now
A Generational Leap in Edge Computing with the Versal ACAPDOWNLOAD NOW
Designer's Journey: Navigating the Transition to Versal ACAPDOWNLOAD NOW
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